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HeiHuDie

PROFILE

Heihudie

Worked on OpenXiangShan projects, delivering hardware and emulator enhancements across RISC-V CPU and vector paths. Focused on floating-point and vector instruction support, this developer improved parameterization in the YunSuan repository, enabling robust FP conversions and hardware scaling. They expanded F16 instruction set compatibility, refined decoding logic, and enhanced debugging through CI/CD and emulator updates. Using Scala, C, and Python, they addressed correctness in floating-point arithmetic, vector dependencies, and submodule integration. Their work included bug fixes and new features in XiangShan and ready-to-run, resulting in more accurate simulation, broader hardware compatibility, and improved stability for complex system workloads.

Overall Statistics

Feature vs Bugs

50%Features

Repository Contributions

22Total
Bugs
8
Commits
22
Features
8
Lines of code
362
Activity Months4

Work History

November 2025

2 Commits

Nov 1, 2025

Month: 2025-11 — Focused on improving DecodeUnit correctness for RVV paths, with emphasis on emulation fractional calculation and vector instruction dependency handling. Implemented two related changes that enhance decoding reliability and vector operation handling; these improvements reduce misdecode risk and improve execution stability for vector workloads. Highlights include the following commits: b5911ed5d7ecd02dd4802631b32cf745ea634cbd (fix(rvv): Fixed whether emul is a fractional) and 6d380e5fbfa434c9059517f14f9cdb74fc6a9dce (feat(rvv): Add oldvd dependency clearing for some instructions).

January 2025

3 Commits • 1 Features

Jan 1, 2025

January 2025: Delivered targeted FP correctness fixes and NEMU readiness improvements across OpenXiangShan/XiangShan and ready-to-run, focusing on FP EEW handling, SEW/vsew8 support, and NEMU stability. Key outcomes include enabling vsew8 in zvfh, updating NEMU references across submodules, and broad stability/refactor improvements to the simulator and build/config infrastructure. These changes improve FP accuracy for double-precision paths, expand SEW support, and reduce integration risk for future workloads.

November 2024

16 Commits • 7 Features

Nov 1, 2024

November 2024 monthly summary outlining key delivered features, major bugs fixed, and overall impact across the OpenXiangShan projects. Focused on expanding F16 support, aligning references and CI coverage, and tightening correctness in FP and vector paths. Business value centers on broader hardware compatibility testing, improved debugging capabilities, and more accurate numerical behavior across simulators and emulators.

October 2024

1 Commits

Oct 1, 2024

Concise monthly summary for OpenXiangShan/YunSuan (2024-10). Focused on delivering robust FP conversion reliability through parameterization improvements in the postnorm stage.

Activity

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Quality Metrics

Correctness87.2%
Maintainability86.4%
Architecture85.8%
Performance80.0%
AI Usage20.8%

Skills & Technologies

Programming Languages

BinaryCPythonScalaShellYAML

Technical Skills

CI/CDCPU architectureComputer ArchitectureDebuggingDigital LogicDigital Logic DesignEmbedded SystemsEmbedded systemsEmulator DevelopmentFPGAFPGA DevelopmentFloating Point ArithmeticGitHardware DesignInterpreter Development

Repositories Contributed To

5 repos

Overview of all repositories you've contributed to across your timeline

OpenXiangShan/XiangShan

Nov 2024 Nov 2025
3 Months active

Languages Used

PythonScalaYAMLShell

Technical Skills

CI/CDComputer ArchitectureDigital LogicDigital Logic DesignFPGAHardware Design

OpenXiangShan/YunSuan

Oct 2024 Nov 2024
2 Months active

Languages Used

Scala

Technical Skills

Digital Logic DesignFPGA DevelopmentHardware DesignFPGAFloating Point Arithmetic

OpenXiangShan/ready-to-run

Nov 2024 Jan 2025
2 Months active

Languages Used

Binary

Technical Skills

Embedded SystemsInterpreter DevelopmentSystem IntegrationDebuggingEmulator DevelopmentSystem Development

OpenXiangShan/NEMU

Nov 2024 Nov 2024
1 Month active

Languages Used

C

Technical Skills

CPU architectureEmbedded systemsEmulator DevelopmentLow-level programmingRISC-VSystem Programming

OpenXiangShan/riscv-isa-sim

Nov 2024 Nov 2024
1 Month active

Languages Used

C

Technical Skills

Embedded SystemsRISC-V