VirisOnGithub/compilation
Dec 2024 – Jan 2025
2 Months active
Languages Used
Java
Technical Skills
Assembly GenerationCode GenerationCompiler DesignAbstract Syntax TreesAssembly Language
Louison Parant
PROFILE
Louison Parant
Worked on the VirisOnGithub/compilation repository to develop and extend a Java-based code generation module for a compiler, focusing on translating high-level arithmetic and logical operations into assembly language. Over two months, implemented core features such as arithmetic operation support, conditional logic, and foundational variable management by leveraging abstract syntax trees and assembly generation techniques. The approach emphasized robust register management, stack handling, and the introduction of IR visitors to drive IR-to-assembly translation. Code quality and maintainability were reinforced through systematic cleanup and merge resolution, laying groundwork for future enhancements while ensuring stability and alignment with established compiler design principles.
Overall Statistics
Feature vs Bugs
100%Features
Repository Contributions
7Total
Bugs
0
Commits
7
Features
4
Lines of code
1,303
Activity Months2
Your Network
19 peopleSame Organization
@etu.univ-lyon1.fr7
Shared Repositories
12
Work History
January 2025
5 Commits • 3 Features
Jan 1, 2025January 2025 (VirisOnGithub/compilation) focused on expanding the CodeGenerator with core generation capabilities, stabilization, and groundwork for future variable support. Delivered three codegen enhancements, applied cleanup to improve maintainability, and resolved a merge-related issue to reinforce code quality. Key outcomes: (1) Basic operation support and cleanup: added visitInteger, visitBoolean, visitAnd, visitOr; merge/formatting cleanup to uphold code quality. (Commit references: 40da64494b9bccc4015262bd70b256c2b6b8d663; eeeb7c89dc9445f9f4cd5c172284e56018d7bcb0). (2) Conditional logic support: enabled code generation for comparison and equality/inequality operators (>, <, >=, <=, ==, !=). (Commits: 0d73869b2726691f84d519773923aa90b4e1624c; d8c85498a2d440e448468aa28d0552f07acb0d36). (3) Variable management groundwork: introduced a variable storage structure and constructor changes for future declarations/assignments (Commit: 31b038809deb7caa9520b5bd97bf4f24b369168e). (4) Stability improvement: resolved a merge-related issue and performed formatting cleanup to heighten stability across the CodeGenerator module (Commit: eeeb7c89dc9445f9f4cd5c172284e56018d7bcb0).
5 Commits • 3 Features
Jan 1, 2025January 2025 (VirisOnGithub/compilation) focused on expanding the CodeGenerator with core generation capabilities, stabilization, and groundwork for future variable support. Delivered three codegen enhancements, applied cleanup to improve maintainability, and resolved a merge-related issue to reinforce code quality. Key outcomes: (1) Basic operation support and cleanup: added visitInteger, visitBoolean, visitAnd, visitOr; merge/formatting cleanup to uphold code quality. (Commit references: 40da64494b9bccc4015262bd70b256c2b6b8d663; eeeb7c89dc9445f9f4cd5c172284e56018d7bcb0). (2) Conditional logic support: enabled code generation for comparison and equality/inequality operators (>, <, >=, <=, ==, !=). (Commits: 0d73869b2726691f84d519773923aa90b4e1624c; d8c85498a2d440e448468aa28d0552f07acb0d36). (3) Variable management groundwork: introduced a variable storage structure and constructor changes for future declarations/assignments (Commit: 31b038809deb7caa9520b5bd97bf4f24b369168e). (4) Stability improvement: resolved a merge-related issue and performed formatting cleanup to heighten stability across the CodeGenerator module (Commit: eeeb7c89dc9445f9f4cd5c172284e56018d7bcb0).
January 2025
December 2024
2 Commits • 1 Features
Dec 1, 2024December 2024 monthly summary for VirisOnGithub/compilation: Implemented core arithmetic operation code generation, enabling assembly generation for addition, subtraction, multiplication, division, and modulo within the CodeGenerator. This work required robust register management, stack handling, and introduction of new arithmetic instructions. Added and wired visitors for arithmetic nodes (visitAddition and visitMultiplication) to drive IR-to-assembly translation. The work is foundational for executing arithmetic expressions efficiently in generated code. Commits include aeab7c132f300bc40e9507e713b1719e88425473 (Add visitAddition) and 540dbdddf63d25c95933f0fa472f047c7d4f5143 (Add visitMultiplication).
December 2024
2 Commits • 1 Features
Dec 1, 2024December 2024 monthly summary for VirisOnGithub/compilation: Implemented core arithmetic operation code generation, enabling assembly generation for addition, subtraction, multiplication, division, and modulo within the CodeGenerator. This work required robust register management, stack handling, and introduction of new arithmetic instructions. Added and wired visitors for arithmetic nodes (visitAddition and visitMultiplication) to drive IR-to-assembly translation. The work is foundational for executing arithmetic expressions efficiently in generated code. Commits include aeab7c132f300bc40e9507e713b1719e88425473 (Add visitAddition) and 540dbdddf63d25c95933f0fa472f047c7d4f5143 (Add visitMultiplication).
Activity
Loading activity data...
Quality Metrics
Correctness82.8%
Maintainability82.8%
Architecture82.8%
Performance77.2%
AI Usage25.8%
Skills & Technologies
Programming Languages
Java
Technical Skills
Abstract Syntax TreesAssembly GenerationAssembly LanguageCode GenerationCompiler Design
Repositories Contributed To
Overview of all repositories you've contributed to across your timeline