Worked on the firecracker-microvm/firecracker repository to implement Virtio-mmio DMA coherence support for aarch64 platforms lacking full Stage-2 FWB. Addressed a cache coherency gap by adding the dma-coherent property to virtio-mmio nodes in the aarch64 device tree, ensuring correct memory attributes for virtio queue operations. This change improved IO reliability and correctness across a wider range of hardware, reducing the risk of data corruption during virtio IO. The work required a strong understanding of Rust, embedded systems, and system programming, and demonstrated the ability to make cross-domain changes involving kernel, device tree, and virtualization architecture.