Worked on the pulp-platform/snitch_cluster repository, focusing on enhancing the reliability of DMA routing logic in SystemVerilog-based digital hardware design. Addressed a critical issue in the DMA crossbar rule generation by ensuring the index variable only increments when bootrom is enabled, preventing unintended behavior when bootrom is disabled. This fix reduces the risk of incorrect hardware operation and lays the groundwork for future support of bootrom and aliasing configurations. Leveraged expertise in SystemVerilog, digital design, and hardware design to improve system stability, demonstrating a methodical approach to debugging and maintaining complex hardware logic in collaborative open-source environments.