Worked on the intel/mlir-extensions repository to enhance the robustness of vector mask handling in SPIR-V lowering, focusing on preventing overflow risks and improving maintainability. Addressed a critical bug by migrating the vector mask type from 32-bit to 64-bit, ensuring compatibility with kernels that return i8 tensors. Implemented both runtime and compile-time assertions to detect potential overflows early, contributing to safer and more reliable execution. Utilized C++, MLIR, and GPU programming expertise to deliver a targeted fix that reduced masking-related defects in production workloads, ultimately improving the reliability and compatibility of the codebase with downstream kernel operations.