Ayistar worked on the vllm-project/vllm-ascend repository, focusing on optimizing the prefill host-device synchronization path for Qwen3Next and Qwen3.5 models on Ascend hardware. Addressing a critical performance bottleneck, Ayistar replaced an inefficient host-side operation with a custom Triton kernel to clear SSM states, thereby improving throughput and reducing host-bound delays. The solution was implemented in Python and leveraged deep learning and GPU programming expertise to ensure compatibility with the vLLM 0.18.0 baseline. This targeted bug fix enhanced the stability and speed of prefill operations, demonstrating a deep understanding of both machine learning workflows and hardware optimization.