Developed a hardware-accelerated attention framework within the tathagatasrimani/codesign repository, focusing on optimizing deep learning attention computations for accelerator hardware. The work centered on implementing attention.cpp, which introduced cache initialization and step-wise attention processing to support efficient execution on FPGA platforms. Leveraging C++ and Tcl, the developer integrated a high-level synthesis (HLS) benchmarking suite to validate and optimize performance, enabling reproducible benchmarking and early-stage optimization within the Codesign pipeline. Over the course of the month, the primary emphasis was on establishing a robust acceleration foundation, with no major bugs reported and all efforts directed toward feature development and hardware integration.