Worked on enhancing the CI pipeline for Intel hardware testing in the vllm-project/ci-infra repository, focusing on improving test coverage and resource efficiency. Updated CI templates using Jinja2 to conditionally trigger Intel CPU tests based on branch selection, and integrated steps to run both CPU and GPU tests within the same workflow. Leveraged expertise in build systems and CI/CD to refine the hardware testing process, reducing unnecessary test runs and accelerating feedback for Intel-related changes. The work resulted in a more reliable and efficient CI pipeline, supporting better cross-hardware validation without introducing new bugs during the development period.