Worked on the intel/intel-graphics-compiler repository to deliver NVL SIP support in the graphics compiler, focusing on next-generation Xe architectures. This involved adding two new configuration files for Xe3PLPGSIPDebug64b, which enabled NVL debugging and diagnostics capabilities and established a foundation for future NVL workload optimization. The approach emphasized maintaining build stability and traceability through targeted configuration updates, with changes clearly documented in commit messages. Utilized C++ development skills alongside expertise in embedded systems and graphics programming to implement these enhancements. No major bugs were reported or fixed during this period, reflecting a focused effort on feature delivery and configuration management.