During a two-month period, Levizh enhanced the levizh/rt-thread repository by improving documentation for the Shared Memory API, focusing on Doxygen-style comments to clarify public interfaces and control structures in C. This work increased maintainability and streamlined onboarding for developers integrating shared memory features. In the riscv/sail-riscv repository, Levizh implemented a validation mechanism in C++ to ensure that the Device Tree Blob (DTB) range is fully contained within a single configured memory region, adding overflow checks and explicit error handling. These contributions demonstrated careful attention to system programming, memory management, and robust API design in embedded environments.