Worked on the ROCm/FBGEMM repository to deliver bf16 floating-point support for Sparse Group Index Selection in the CUDA path, expanding compatibility for bf16 workloads on CUDA-enabled GPUs. The technical approach involved replacing the FBGEMM_DISPATCH_FLOAT_AND_HALF macro with FBGEMM_DISPATCH_FLOATING_TYPES, which broadened floating-point type compatibility and simplified the dispatch logic. This change improved maintainability by reducing edge cases in floating-point type handling and enabled potential performance gains for bf16-capable hardware. The work was implemented using C++, CUDA, and GPU programming skills, focusing on enhancing hardware compatibility and streamlining code paths without introducing new bugs during the development period.