Worked on enhancing DeepSpeed’s compatibility with MPS devices by addressing timer event handling and communication backend behavior in the microsoft/DeepSpeed repository. Focused on enabling FP32 Zero-Stage-0 runs on MPS by implementing a host timer fallback mechanism, ensuring stable operation where CUDA-like timer events are unavailable. Improved the system to avoid unnecessary broadcasting or all-reduce operations when no communication backend is defined, which reduced runtime errors and improved portability. Utilized Python and deep learning expertise, along with GPU programming skills, to clarify MPS-specific code paths and update documentation, supporting easier onboarding and future hardware support within the DeepSpeed framework.