During July 2025, Jamil Rahmeh updated the riscv/riscv-cheri repository to clarify the behavior of the G bit in G-stage page table entries. He focused on technical writing and documentation using adoc, ensuring the documentation now states that the G bit is not used by hardware and should be ignored. This change resolved a contradiction that previously suggested reserved bits could cause page faults, aligning the documentation with the official architectural specification. By improving clarity and reducing ambiguity, Jamil’s work supports smoother integration for contributors and downstream tooling, ultimately enhancing the reliability and maintainability of the project’s documentation.