Worked on the tianocore/edk2 repository to enhance system stability during multi-core initialization on ARM-based embedded systems. Addressed a bug where secondary cores could encounter SIMD traps by configuring the FPEN bits in the CPACR_EL1 register, ensuring proper floating-point and SIMD enablement at EL1. This low-level fix, implemented in Assembly, prevents VFP and SIMD-related exceptions as additional cores are brought online by ArmPsciMpServicesDxe. The solution improved reliability and reduced latency during startup by eliminating unnecessary trap handling. All changes were documented and traceable, supporting future maintenance and auditability within the context of ARM architecture and embedded programming.