Worked on the levizh/rt-thread repository to improve kernel memory management, focusing on a critical bug fix related to AArch64 TLB invalidation. Addressed the distinction between kernel and user address spaces by implementing global invalidation for kernel memory and ASID-specific invalidation for user memory with non-global page table entries. This approach reduced TLB-related edge cases and enhanced the reliability of memory protection within the RT-Thread kernel. Utilized skills in AArch64, Assembly, and C to deliver a targeted patch, documenting the changes thoroughly and contributing to the maintainability and stability of low-level kernel code in a collaborative environment.