Worked on performance optimization in the JetBrains/JetBrainsRuntime repository, focusing on AArch64 AtomicLong methods. Implemented a targeted change in C++ that conditionally omits a memory barrier instruction when the Large System Extension (LSE) is not present, thereby reducing unnecessary synchronization overhead. This assembly-level optimization removed a redundant dmb instruction, resulting in lower instruction counts and improved throughput for concurrent AtomicLong operations on non-LSE configurations. The work demonstrated expertise in low-level programming and compiler development, delivering a precise, architecture-aware enhancement that addressed a specific bottleneck in high-concurrency scenarios without introducing new bugs or regressions during the period.