Worked on hardware and tooling improvements across two repositories, focusing on code quality and developer experience. In lowRISC/opentitan, refactored the GPIODPI module by introducing an explicit continuous assign for eff_clk, moving initialization logic to a dedicated assign statement based on clk_i and active signals. This change improved clock gating correctness and maintainability using SystemVerilog and digital logic design principles. Later, addressed a SystemVerilog syntax highlighting issue in macvim-dev/macvim by updating Vim script patterns to correctly handle covergroup blocks, restoring accurate editor functionality for verification code. Demonstrated attention to detail in both hardware design and text editor development workflows.