Worked on backend reliability and performance improvements in PyTorch and jeejeelee/vllm, focusing on Python, ROCm, and Triton. Addressed a critical test reliability issue in PyTorch by refining kernel name extraction for RDNA hardware, switching to ungrouped event verification to ensure accurate profiling and stable test results. In jeejeelee/vllm, resolved a memory allocation bug in the MoE ROCm unquantized Triton path by preserving weight padding and skipping unnecessary memory reallocation, maintaining correct memory layout on AMD hardware. Emphasized robust unit testing and performance profiling, contributing to more stable ROCm environments and reducing debugging time for AMD deployments.