In December 2025, delivered performance optimization for the rejection sampler in vllm-ascend, achieving ~23% speedup in rejection sampling under serve/bench workloads. Implemented vectorization of key loops and removed blocking torchnpu operator usage to enable non-blocking launches, preserving user-visible behavior. Change tracked under commit d8e15dae6c5e563c3284309d4557afb4d4a17feb and PR #4587. Validated with serve/bench tests across data-parallel and tensor-parallel configurations; no user-facing changes. Impact: higher concurrency, lower latency, enabling better SLA adherence and potential cost efficiencies. Technologies demonstrated: PyTorch reject sampler optimizations, loop vectorization, non-blocking NPU ops, torchnpu, end-to-end bench validation; collaboration with co-authors. Baseline context: vLLM 0.12.0.