Worked on enhancing the correctness and stability of the riscv-unified-db encoding database, focusing on embedded systems and instruction set architecture. Addressed a critical issue by updating the addiw.yaml file to correct the Addiw instruction’s encoding match, ensuring the binary representation aligns precisely with the RISC-V specification. This targeted fix improved the reliability of decoding processes for downstream tooling and continuous integration checks. Leveraged expertise in YAML and embedded systems to ensure data integrity and reduce verification risks. The work demonstrated careful attention to specification compliance and contributed to more robust tooling pipelines within the riscv-software-src/riscv-unified-db repository.