
During a three-month period, Dragan Zivanovic enhanced the tenstorrent/tt-umd and tt-metal repositories by developing robust simulation and device management features using C++ and embedded systems expertise. He implemented per-core RISC reset and DMA I/O support in the simulation device, enabling targeted debugging and more reliable validation across silicon and simulation environments. Dragan introduced thread-safety through a LockManager, improving concurrency and reducing race conditions in simulation workflows. He also addressed CI reliability by adding hostname resolution fallbacks and documentation for continuous integration. His work emphasized system programming, multithreading, and code refactoring, resulting in cleaner, more maintainable, and testable codebases.

September 2025 monthly summary highlighting key business value and technical achievements across two repositories (tt-umd, tt-metal). Focus areas include CI reliability improvements, code cleanliness, and documentation to accelerate validation and onboarding.
September 2025 monthly summary highlighting key business value and technical achievements across two repositories (tt-umd, tt-metal). Focus areas include CI reliability improvements, code cleanliness, and documentation to accelerate validation and onboarding.
In 2025-08 for tenstorrent/tt-umd, delivered essential concurrency hardening and environment stabilization to enable reliable, scalable simulation workflows. Key features delivered: - Thread-Safe TT_SimulationDevice API with LockManager: Introduced thread-safety to the TT_SimulationDevice API by integrating a LockManager, initializing and acquiring locks for the TT_SIMULATOR mutex type across device interaction functions (e.g., DPRINT) to enable safe multi-threaded usage. Commit: 57fa425670595bb446e56748cf2d8acd4a7dba91 ("Add locks inside Simulation device API (#1185)"). Impact: enables safe concurrent simulations, reduces race conditions, and provides a foundation for higher-throughput testing. Major bug fixes: - Disable NOC translation in mock cluster for Blackhole Simulator: Disables NOC translation by default because NOC translation is not supported on the Blackhole Simulator used for the Simulator chip, ensuring compatibility and correct behavior in the simulation environment. Commit: b7c77ab6c60e203b65444cb115741ce49633f41e ("NOC translation disabled in mock cluster (#1204)"). Impact: improves reliability and determinism of simulation runs and avoids misleading test failures. Overall impact and accomplishments: - Strengthened reliability and performance potential of simulation workloads through thread-safety and environment alignment, enabling more accurate validation of hardware/software interactions and faster troubleshooting of concurrency-related issues. Technologies/skills demonstrated: - Concurrency control and thread-safety through LockManager integration. - Simulation environment hardening and compatibility improvements. - Change management with targeted commits and clear messaging (#1185, #1204).
In 2025-08 for tenstorrent/tt-umd, delivered essential concurrency hardening and environment stabilization to enable reliable, scalable simulation workflows. Key features delivered: - Thread-Safe TT_SimulationDevice API with LockManager: Introduced thread-safety to the TT_SimulationDevice API by integrating a LockManager, initializing and acquiring locks for the TT_SIMULATOR mutex type across device interaction functions (e.g., DPRINT) to enable safe multi-threaded usage. Commit: 57fa425670595bb446e56748cf2d8acd4a7dba91 ("Add locks inside Simulation device API (#1185)"). Impact: enables safe concurrent simulations, reduces race conditions, and provides a foundation for higher-throughput testing. Major bug fixes: - Disable NOC translation in mock cluster for Blackhole Simulator: Disables NOC translation by default because NOC translation is not supported on the Blackhole Simulator used for the Simulator chip, ensuring compatibility and correct behavior in the simulation environment. Commit: b7c77ab6c60e203b65444cb115741ce49633f41e ("NOC translation disabled in mock cluster (#1204)"). Impact: improves reliability and determinism of simulation runs and avoids misleading test failures. Overall impact and accomplishments: - Strengthened reliability and performance potential of simulation workloads through thread-safety and environment alignment, enabling more accurate validation of hardware/software interactions and faster troubleshooting of concurrency-related issues. Technologies/skills demonstrated: - Concurrency control and thread-safety through LockManager integration. - Simulation environment hardening and compatibility improvements. - Change management with targeted commits and clear messaging (#1185, #1204).
June 2025 performance summary for tenstorrent/tt-umd focused on delivering robust per-core control, reliable simulation workflows, and cross-environment test coverage to reduce debugging surface and accelerate validation cycles. Key outcomes include targeted core resets in the simulator, DMA I/O support to the SimulationDevice to eliminate llk-induced segfaults, and lifecycle/test infrastructure improvements that unify Silicon and Simulation testing while strengthening resource management. Business value: improved per-core debugging capability, more reliable simulation runs, and faster, higher-quality validation across environments, enabling earlier bug detection and reduced QA cycles.
June 2025 performance summary for tenstorrent/tt-umd focused on delivering robust per-core control, reliable simulation workflows, and cross-environment test coverage to reduce debugging surface and accelerate validation cycles. Key outcomes include targeted core resets in the simulator, DMA I/O support to the SimulationDevice to eliminate llk-induced segfaults, and lifecycle/test infrastructure improvements that unify Silicon and Simulation testing while strengthening resource management. Business value: improved per-core debugging capability, more reliable simulation runs, and faster, higher-quality validation across environments, enabling earlier bug detection and reduced QA cycles.
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