Worked on the Matziaz/TE2002B repository to enhance cryptographic flexibility by implementing an inverse key schedule capability within the KeySchedule module. Focused on digital design and cryptography, the update introduced a key_schedule_inverse entity in VHDL, enabling generation of all subkeys in reverse order from Round 10 down to Round 0. This approach supports alternative cryptographic workflows that require reverse subkey derivation, improving interoperability for hardware-based encryption systems. The work was carefully scoped to a single, traceable code update, emphasizing maintainability and clear documentation. No bug fixes were recorded, with efforts concentrated on feature development and codebase clarity using hardware description languages.