Worked on the OpenXiangShan-Nanhu/Nanhu-V5 repository, focusing on hardware design and register initialization using Scala. Addressed a critical stability issue in the prefetch subsystem by fixing a bug related to the initialization of l1_array and l2_array prefetch registers. The solution involved setting these registers to default states, which reduced the risk of uninitialized and x-states in the prefetch logic. This targeted change improved runtime reliability, especially under memory-intensive workloads. The work demonstrated careful low-level debugging and precise code modification, resulting in a maintainable patch that enhanced the stability of the prefetching mechanism without introducing new features.