Worked on the Chips Alliance Caliptra projects, delivering two FPGA bitstream updates that enhanced hardware-software integration across the caliptra-mcu-sw and caliptra-sw repositories. Focused on updating hardware artifacts and synchronizing RTL references, the developer improved traceability and deployment reliability for platform upgrades. The work involved modifying TOML manifests to reference new bitstream versions and hashes, ensuring alignment between FPGA artifacts and RTL commits. Leveraging skills in embedded systems and FPGA development, the developer enabled smoother cross-repository upgrades and strengthened the readiness of the MCU software stack for future enhancements, with all changes focused on artifact consistency and maintainability.