During December 2025, KT Barrett enhanced the antmicro/verilator repository by implementing support for signed integer properties in the Verilator VPI interface. This feature enables accurate simulation of signed data paths, addressing a key need in hardware verification workflows. KT Barrett’s work involved C++ development and integration with Verilog through the Verilog Procedural Interface, ensuring that simulations now reflect the behavior of signed data types. The update improved test coverage and verification fidelity, allowing earlier detection of defects and reducing integration risk. The depth of the contribution is reflected in careful patch management and participation in the code review process.