During November 2025, Biko focused on improving the reliability of UDP matching in the antmicro/verilator repository. He addressed a subtle issue in Verilog simulation by updating the C++ codebase to ensure that UDP input handling correctly ignores 'x' values, which previously led to erroneous matches. To validate this fix, Biko developed comprehensive regression tests in both sequential and non-sequential contexts using Python scripting and Verilog testbenches. This targeted bug fix reduced false positives in simulation results and shortened debugging cycles. Biko’s work demonstrated careful attention to simulation correctness and contributed to greater user trust in Verilator’s output.