Developed a high-performance fused sigmoid-gating delta-rule (FSGDR) kernel for the jd-opensource/xllm repository, targeting Ascend NPU hardware. The implementation leveraged TileLang for kernel development and C++ for robust wrapper integration, ensuring seamless compatibility with PyTorch reference models. Comprehensive unit tests were created using GTest to validate correctness and maintain parity with existing frameworks. This work optimized state-space model scanning operations, resulting in improved throughput and reduced latency for NPU-based inference and training workloads. The feature was integrated with CI-friendly test coverage, resolving minor integration issues and enabling accelerated deployment of SSM workloads on specialized hardware platforms.