Worked on enhancing hardware status visibility within the edge-core/sonic-buildimage repository by delivering a targeted feature that improved CPLD status descriptions for Accton es9618xx boards. Leveraging Python and expertise in device configuration and firmware management, updated component.py to provide explicit CPLD module functions, such as FPGA board control, OSFP pins and LEDs, and FANs control. This enhancement enriched the output of the firmware status command, making diagnostics clearer and reducing interpretation effort for field engineers and customers. The work focused on maintainability and clarity, supporting faster issue triage and onboarding while laying groundwork for future hardware status improvements.