Clayton Kuchta developed and integrated the Manufacturer Control Interface within the chipsalliance/caliptra-ss repository, enabling robust SoC-to-MCU communication with features such as configuration, memory access control, and error handling. He approached the project with a focus on modular design and RTL development, using SystemVerilog to ensure maintainability and clear hardware-software boundaries. In the chipsalliance/caliptra-rtl repository, Clayton refactored the Watchdog Timer for modularity and reusability, decoupling it from existing packages and enforcing hardware restrictions. His work included updating documentation and build-system integration, laying a foundation for reliable firmware control and system-level validation in embedded systems environments.